Welcome to the Wikiversity content-development project for the VHDL computer language, part of the Division of Computer Programming.

Completion status: this resource is a stub, so not much has been done yet.
Type classification: this resource is a course.
Educational level: this is a tertiary (university) resource.
Subject classification: this is an information technology resource.

Introduction

VHDL (Very High Speed Integrated Circuit Hardware Descriptive Language) is a hardware-descriptive programming language originally commissioned by the U.S Department of Defense in order to document the behavior of the ASICs that supplier companies were including in equipment.

VHDL is the most commonly used and arguably the most powerful hardware descriptive language in use, with the runners up being Verilog and AHDL. HDLs are used in FPGA (Field Programmable Gate Array) programming as well as ASIC prototyping and development.

This course will outline the distinguishing features of VHDL among HDLs, as well as the conceptual differences between HDLs and standard, sequential programming languages. It will go on to detail the software and hardware required to program in VHDL, the syntax and coding practices most prevalent in the FPGA/ASIC industry, and finally provide external resources for education which is proprietary (of which there is a great deal).

Prerequisites

Though this course will strive to provide a comprehensive background for those who are new to concurrent, hardware programming, an understanding of standard programming (in a language such as C/C++) is essential to adopting this new and challenging area of computer science.

Because of the hardware-based nature of coding in VHDL, a development platform is an asset in learning the language. Resources will be provided at the bottom of the page on how to acquire or simulate these devices.

Additionally, a background in computer usage is essential, and a knowledge of hardware programming or design is an asset.

Lessons

Though the lesson plan is to be determined, the following is a basic layout of the major topics this course will seek to cover.

  • Basic Nomenclature
  • Introduction to HDLs
  • Overview of VHDL
  • Concurrent vs. Sequential Programming
  • Development Platforms and Manufacturers
  • ASIC vs. FPGA
  • VHDL Hardware Requirements
  • VHDL Software Requirements
  • VHDL Simulation and Synthesis
  • VHDL Hardware Description with Code
  • VHDL Signals
  • VHDL Variables
  • VHDL Modules
  • Modular Design with VHDL
  • VHDL Components
  • Sequential Programming with VHDL
  • VHDL Conditionals
  • VHDL Loops
  • Concurrent Programming with VHDL
  • VHDL Generation Statements
  • VHDL Generation Conditionals
  • Combining Sequential and Concurrent Elements
  • Advanced Synthesis

Manufacturers

  • Altera
  • Xilinx
  • Lattice
  • Altera - Quartus II
  • Xilinx - ISE

References

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