Programmable Logic Devices

• PLA
• PAL
• GAL
• CPLD
• FPGA

FPGA Architectures

• Basic structure of FPGAs (pdf)
• FPGA based on SRAMs (pdf)
• FPGA based on ROMs with anti-fuses (pdf)
• FPGA based on Non-volatile Memories (pdf)
• Features of FPGAs

Circuit Level Characteristics

• Logic Cell Circuit
• IO Cell Circuit
• Interconnect Circuit

FPGA Development Phases

• Design
• Simulation
• Synthesis
• Implementation (pdf)
• Programming

Clocking Scheme

• Clock Control
• Clock Domain
• Reset Signals
• Xilinx DCM & 2-phase clock, Contraining technique
• Xilinx XPower, Power and Energy Aware Design?

Using ROM

• VHDL Example Code ( pdf )

Latch based design

• Latch in FGPA ( pdf )

Dual Edge Triggered Flip Flop based design

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